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FEATURES Single- or Dual-Supply Operation Low Noise: 4.7 nV/Hz @ 1 kHz Wide Bandwidth: 3.4 MHz Low Offset Voltage: 100 V Very Low Drift: 0.2 V/ C Unity Gain Stable No Phase Reversal APPLICATIONS Digital Scales Multimedia Strain Gages Battery-Powered Instrumentation Temperature Transducer Amplifier GENERAL DESCRIPTION
Low Noise, Low Drift Single-Supply Operational Amplifiers OP113/OP213/OP413
PIN CONNECTIONS 8-Lead Narrow-Body SO
NULL -IN A +IN A V- 4 5 1 8 NC V+ OUT A NULL +IN A V- 3 4 6 5 OUT A NULL NULL -IN A
8-Lead Plastic DIP
1 2 8 7 NC V+
OP113
NC = NO CONNECT
OP113
NC = NO CONNECT
8-Lead Narrow-Body SO
OUT A -IN A +IN A V-
8-Lead Plastic DIP
1 2 3 4 8 7 6 5 V+ OUT B -IN B +IN B
The OP113 family of single supply operational amplifiers features both low noise and drift. It has been designed for systems with internal calibration. Often these processor-based systems are capable of calibrating corrections for offset and gain, but they cannot correct for temperature drifts and noise. Optimized for these parameters, the OP113 family can be used to take advantage of superior analog performance combined with digital correction. Many systems using internal calibration operate from unipolar supplies, usually either 5 V or 12 V. The OP113 family is designed to operate from single supplies from 4 V to 36 V, and to maintain its low noise and precision performance. The OP113 family is unity gain stable and has a typical gain bandwidth product of 3.4 MHz. Slew rate is in excess of 1 V/s. Noise density is a very low 4.7 nV/Hz, and noise in the 0.1 Hz to 10 Hz band is 120 nV p-p. Input offset voltage is guaranteed and offset drift is guaranteed to be less than 0.8 V/C. Input common-mode range includes the negative supply and to within 1 V of the positive supply over the full supply range. Phase reversal protection is designed into the OP113 family for cases where input voltage range is exceeded. Output voltage swings also include the negative supply and go to within 1 V of the positive rail. The output is capable of sinking and sourcing current throughout its range and is specified with 600 loads. Digital scales and other strain gage applications benefit from the very low noise and low drift of the OP113 family. Other applications include use as a buffer or amplifier for both A/D and D/A sigma-delta converters. Often these converters have high resolutions requiring the lowest noise amplifier to utilize their full potential. Many of these converters operate in either single supply or low supply voltage systems, and attaining the greater signal swing possible increases system performance.
OUT A -IN A +IN A V-
1
8
V+ OUT B -IN B
OP213
4 5
+IN B
OP213
14-Lead Plastic DIP
OUT A -IN A +IN A V+ +IN B -IN B OUT B 1 2 3 4 5 6 7 14 OUT D 13 -IN D 12 +IN D
16-Lead Wide-Body SO
OUT A -IN A +IN A V+ +IN B -IN B OUT B NC 8 9 1 16 OUT D -IN D +IN D
OP413
V- +IN C -IN C OUT C NC
OP413
11 V- 10 +IN C 9 8 -IN C OUT C
NC = NO CONNECT
The OP113 family is specified for single 5 V and dual 15 V operation over the XIND--extended industrial (-40C to +85C) temperature range. They are available in plastic and SOIC surface mount packages.
REV. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2002
OP113/OP213/OP413-SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ V =
S
15.0 V, TA = 25 C unless otherwise noted.
Min E Grade Typ Max Min F Grade Typ Max Unit
Parameter
Symbol
Conditions
INPUT CHARACTERISTICS Offset Voltage VOS
Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Large Signal Voltage Gain
IB IOS VCM CMR
OP113 -40C TA +85C OP213 -40C TA +85C OP413 -40C TA +85C VCM = 0 V, -40C TA +85C VCM = 0 V -40C TA +85C -15 100 97 1 1 2
240
75 125 100 150 125 175 600 700 50 +14 -15 96 94 1 1 2 150 0.8
150 225 250 325 275 350 600 700 50 +14
V V V V V V nA nA nA V dB dB V/V V/V
Long-Term Offset Voltage1 Offset Voltage Drift2 OUTPUT CHARACTERISTICS Output Voltage Swing High Output Voltage Swing Low Short Circuit Limit
-15 V VCM +14 V -15 V VCM +14 V, -40C TA +85C AVO OP113, OP213, RL = 600 , -40C TA +85C OP413, RL = 1 k, -40C TA +85C RL = 2 k, -40C TA +85C VOS Note 1 VOS/T Note 2
116 116 2.4 2.4 8 0.2
300 1.5
V/V V V/C
VOH VOL ISC
RL = 2 k RL = 2 k, -40C TA +85C RL = 2 k RL = 2 k, -40C TA +85C VS = 2 V to 18 V VS = 2 V to 18 V -40C TA +85C VOUT = 0 V, RL = , VS = 18 V -40C TA +85C
14 13.9 -14.5 40 103 100 120 120 3 3.8 18 -14.5
14 13.9
V V -14.5 V 40 -14.5 V mA dB dB 3 3.8 18 mA mA V
POWER SUPPLY Power Supply Rejection Ratio PSRR Supply Current/Amplifier Supply Voltage Range AUDIO PERFORMANCE THD + Noise Voltage Noise Density Current Noise Density Voltage Noise en in en p-p ISY VS
100 97
4 VIN = 3 V rms, RL = 2 k f = 1 kHz, f = 10 Hz f = 1 kHz f = 1 kHz 0.1 Hz to 10 Hz RL = 2 k VOUT = 10 V p-p RL = 2 k, f = 1 kHz to 0.01%, 0 V to 10 V Step 0.8
4
0.0009 9 4.7 0.4 120 1.2 3.4 105 9 0.8
0.0009 9 4.7 0.4 120 1.2 3.4 105 9
% nV/Hz nV/Hz pA/Hz nV p-p V/s MHz dB s
DYNAMIC PERFORMANCE Slew Rate SR Gain Bandwidth Product GBP Channel Separation Settling Time tS
NOTES 1 Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 C, with an LTPD of 1.3. 2 Guaranteed specifications, based on characterization data. Specifications subject to change without notice.
-2-
REV. D
OP113/OP213/OP413 ELECTRICAL CHARACTERISTICS (@ V = 5.0 V, T = 25 C unless otherwise noted.)
S A
Parameter
Symbol
Conditions OP113 -40C TA +85C OP213 -40C TA +85C OP413 -40C TA +85C VCM = 0 V, VOUT = 2 -40C TA +85C VCM = 0 V, VOUT = 2 -40C TA +85C 0 V VCM 4 V 0 V VCM 4 V, -40C TA +85C OP113, OP213, RL = 600 , 2 k 0.01 V VOUT 3.9 V OP413, RL = 600, 2 k, 0.01 V VOUT 3.9 V Note 1 Note 2
Min
E Grade Typ Max 125 175 150 225 175 250 650 750 50 +4 106
Min
F Grade Typ Max 175 250 300 375 325 400 650 750 50 +4
Unit V V V V V V nA nA nA V dB dB V/V
INPUT CHARACTERISTICS Offset Voltage VOS
Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Large Signal Voltage Gain
IB IOS VCM CMR AVO
300
0 93 90 2 1
90 87 2 1 200 1.0 350 1.5
Long-Term Offset Voltage1 Offset Voltage Drift2 OUTPUT CHARACTERISTICS Output Voltage Swing High
VOS DVOS/DT
0.2
V/V V V/C
VOH
Output Voltage Swing Low
VOL
RL = 600 k RL = 100 k, -40C TA +85C RL = 600 , -40C TA +85C RL = 600 , -40C TA +85C RL = 100 k, -40C TA +85C
4.0 4.1 3.9 8 8 30 1.6 2.7 3.0
4.0 4.1 3.9 8 8 30 2.7 3.0 0.001 9 4.7 0.45 120 0.6 3.5 5.8
V V V mV mV mA mA mA % nV/Hz nV/Hz pA/Hz nV p-p V/s MHz s
Short Circuit Limit POWER SUPPLY Supply Current AUDIO PERFORMANCE THD + Noise Voltage Noise Density Current Noise Density Voltage Noise
ISC ISY ISY VOUT = 2.0 V, No Load -40C TA +85C VOUT = 0 dBu, f = 1 kHz f = 10 Hz f = 1 kHz f = 1 kHz 0.1 Hz to 10 Hz RL = 2 k to 0.01%, 2 V Step 0.6
en in en p-p
0.001 9 4.7 0.45 120 0.9 3.5 5.8
DYNAMIC PERFORMANCE Slew Rate SR Gain Bandwidth Product GBP Settling Time tS
NOTES 1 Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 C, with an LTPD of 1.3. 2 Guaranteed specifications, based on characterization data. Specifications subject to change without notice.
REV. D
-3-
OP113/OP213/OP413
ABSOLUTE MAXIMUM RATINGS 1 ORDERING GUIDE
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . 10 V Output Short-Circuit Duration to GND . . . . . . . . . Indefinite Storage Temperature Range P, S Packages . . . . . . . . . . . . . . . . . . . . . . -65C to +150C Operating Temperature Range OP113/OP213/OP413E, F . . . . . . . . . . . . . -40C to +85C Junction Temperature Range P, S Packages . . . . . . . . . . . . . . . . . . . . . . -65C to +150C Lead Temperature Range (Soldering, 60 sec) . . . . . . . 300C Package Type 8-Lead Plastic DIP (P) 8-Lead SOIC (S) 14-Lead Plastic DIP (P) 16-Lead SOIC (S)
JA 2 JC
Model OP113ES OP113FP* OP113FS OP213EP* OP213ES OP213FP OP213FS OP413ES OP413FP* OP413FS
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description 8-Lead SOIC 8-Lead Plastic DIP 8-Lead SOIC 8-Lead Plastic DIP 8-Lead SOIC 8-Lead Plastic DIP 8-Lead SOIC 16-Lead Wide SOIC 14-Lead Plastic DIP 16-Lead Wide SOIC
Package Options SO-8 N-8 SO-8 N-8 SO-8 N-8 SO-8 R-16 N-14 R-16
Unit C/W C/W C/W C/W
103 158 83 92
43 43 39 27
*Not for new designs; obsolete April 2002.
NOTES 1 Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2 JA is specified for the worst-case conditions, i.e., JA is specified for device in socket for cerdip, P-DIP, and LCC packages; JA is specified for device soldered in circuit board for SOIC package.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP113/OP213/OP413 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
-4-
REV. D
Typical Performance Characteristics-OP113/OP213/OP413
100 VS = 15V TA = 25 C 400 OP AMPS PLASTIC PKG
150 VS = 15V -40 C TA +85 C 400 OP AMPS PLASTIC PKG
80
120
60 UNITS
90
40
UNITS
60
20
30
0 -50
-40
-30 -20 -10 0 10 20 INPUT OFFSET VOLTAGE, VOS -
30 V
40
50
0
0
0.1
0.2
0.3
0.4 0.5 TCVOS -
0.6 V
0.7
0.8
0.9
1.0
TPC 1a. OP113 Input Offset (VOS) Distribution @ 15 V
TPC 2a. OP113 Temperature Drift (TCVOS) Distribution @ 15 V
500 VS = 15V TA = 25 C 896 (PLASTIC)
500
400
OP AMPS
400
VS = 15V -40 C TA +85 C 896 (PLASTIC) OP AMPS
300
UNITS
300
UNITS
200
200
100
100
0 -100
-80
-60
-40
-20
0
20
40
60 V
80
100
0 0 0.1 0.2 0.3 0.4 0.5 0.6 TCVOS - V 0.7 0.8 0.9 1.0
INPUT OFFSET VOLTAGE, VOS -
TPC 1b. OP213 Input Offset (VOS) Distribution @ 15 V
TPC 2b. OP213 Temperature Drift (TCVOS) Distribution @ 15 V
500 VS = 15V TA = 25 C 1220 OP AMPS PLASTIC PKG
600
400
500
400
300
VS = 15V -40 C TA +85 C 1220 OP AMPS PLASTIC PKG
UNITS
UNITS
200 100 0 -60
300
200
100
0
-40 -20 0 20 40 60 80 INPUT OFFSET VOLTAGE, VOS - 100 V 120 140
0
0.1
0.2
0.3
0.4 0.5 0.6 TCVOS - V
0.7
0.8
0.9
1.0
TPC 1c. OP413 Input Offset (VOS) Distribution @ 15 V
TPC 2c. OP413 Temperature Drift (TCVOS) Distribution @ 15 V
REV. D
-5-
OP113/OP213/OP413
1000
500
INPUT BIAS CURRENT - nA
VCM = 0V 600 VS = 5.0V VCM = 2.5V
INPUT BIAS CURRENT - nA
800
400
VS = 5.0V 300 VS = 200 15V
400
200
VS = 15V VCM = 0V
100
0 -75
-50
-25
0 25 50 TEMPERATURE - C
75
100
125
0 -75
-50
-25
25 50 0 TEMPERATURE - C
75
100
125
TPC 3. OP113 Input Bias Current vs. Temperature
TPC 6. OP213 Input Bias Current vs. Temperature
5.0 VS = 5.0V
2.0
15.0 VS = 14.5 15V +SWING RL = 2k
POSITIVE OUTPUT SWING - Volts
POSITIVE OUTPUT SWING - Volts
NEGATIVE OUTPUT SWING - mV
14.0 13.5 13.0 12.5 +SWING RL = 600
4.5 +SWING RL = 2k -SWING RL = 2k
1.5
4.0
1.0
+SWING RL = 600
-13.5 -14.0 -14.5 -SWING RL = 600
3.5 -SWING RL = 600 3.0 -75 -50 -25 0 25 50 TEMPERATURE - C 75 100
0.5
-SWING RL = 2k
0 125
-15.0 -75
-50
-25
0 25 50 TEMPERATURE - C
75
100
125
TPC 4. Output Swing vs. Temperature and RL @ 5 V
TPC 7. Output Swing vs. Temperature and RL @ 15 V
60 40
CHANNEL SEPARATION - dB
20 VS = 15V TA = 25 C
OPEN-LOOP GAIN - V/ V
18 16 14 12 10 8 6 4 2 RL = 600 RL = 2k
VS = 5.0V VO = 3.9V
20 0 -20 -40 -60 -80 -100 -120 10 100 1k 10k 100k FREQUENCY - Hz 1M 10M 105
0 -75
-50
-25
25 50 0 TEMPERATURE - C
75
100
125
TPC 5. Channel Separation
TPC 8. Open-Loop Gain vs. Temperature @ 5 V
-6-
REV. D
OP113/OP213/OP413
12.5 RL = 2k 10.0
OPEN-LOOP GAIN - V/ V
10
VS = VD =
15V 10V
OPEN LOOP GAIN - V/ V
9 8 7 6 5 4 3 RL = 600 2 1 RL = 2k
VS = VO =
15V 10V
7.5 RL = 1k 5.0 RL = 600 2.5
0 -75
-50
-25
0 25 50 TEMPERATURE - C
75
100
125
0 -75
-50
-25
25 50 0 TEMPERATURE - C
75
100
125
TPC 9. OP413 Open-Loop Gain vs. Temperature
TPC 12. OP213 Open-Loop Gain vs. Temperature
100 V+ = 5V V- = 0V TA = 25 C
100 TA= 25 C VS = 15V 0 80 0
80
OPEN-LOOP GAIN - dB
PHASE - Degrees
GAIN 40 PHASE 20 m = 57
GAIN 40 PHASE 20 m = 72 135 90
90
135
0
180
0
180
-20 1k
225 10k 100k FREQUENCY - Hz 1M 10M
-20 1k 10k 100k FREQUENCY - Hz 1M 10M
225
TPC 10. Open-Loop Gain, Phase vs. Frequency @ 5 V
TPC 13. Open-Loop Gain, Phase vs. Frequency @ 15 V
50 V+ = 5V V- = 0V TA = 25 C
50 TA= 25 C VS = 15V
40
40 AV = 100
CLOSED-LOOP GAIN - dB
AV = 100 30 20 AV = 10 10 0 AV = 1
CLOSED-LOOP GAIN - dB
30
20 AV = 10 10 0 AV = 1 -10 -20 1k
-10 -20 1k
10k
100k FREQUENCY - Hz
1M
10M
10k
100k FREQUENCY - Hz
1M
10M
TPC 11. Closed-Loop Gain vs. Frequency @ 5 V
TPC 14. Closed-Loop Gain vs. Frequency @ 15 V
REV. D
-7-
PHASE - Degrees
60
OPEN-LOOP GAIN - dB
45
60
45
OP113/OP213/OP413
70 V+ = 5V V- = 0V
PHASE MARGIN - Degrees
5
70 VS =
GAIN-BANDWIDTH PRODUCT - MHz
5 15V
GAIN-BANDWIDTH PRODUCT - MHz
PHASE MARGIN - Degrees
65
4
65
GBW
4
GBW 60 m 3
m 60 3
55
2
55
2
50 -75
-50
-25
0 25 50 TEMPERATURE - C
75
100
1 125
50 -75
-50
-25
0 25 50 TEMPERATURE - C
75
100
1 125
TPC 15. Gain Bandwidth Product and Phase Margin vs. Temperature @ 5 V
TPC 18. Gain Bandwidth Product and Phase Margin vs. Temperature @ 15 V
30 TA = 25 C VS = 15V 25
3.0 TA = 25 C VS = 15V
CURRENT NOISE DENSITY - pA/ Hz
1 10 100 FREQUENCY - Hz 1k
VOLTAGE NOISE DENSITY - nV/ Hz
2.5
20
2.0
15
1.5
10
1.0
5
0.5
0
0
1
10
100 FREQUENCY - Hz
1k
TPC 16. Voltage Noise Density vs. Frequency
TPC 19. Current Noise Density vs. Frequency
140 V+ = 5V V- = 0V TA = 25 C
140 TA= 25 C VS = 15V
COMMON-MODE REJECTION - dB
100
COMMON-MODE REJECTION - dB
1M
120
120 100
80 60
80 60
40 20 0 100
40 20 0 100
1k
10k FREQUENCY - Hz
100k
1k
10k FREQUENCY - Hz
100k
1M
TPC 17. Common-Mode Rejection vs. Frequency @ 5 V
TPC 20. Common-Mode Rejection vs. Frequency @ 15 V
-8-
REV. D
OP113/OP213/OP413
140 TA = 25 C VS = 15V
40 TA = 25 C VS = 15V 30
+PSRR
POWER SUPPLY REJECTION - dB
120 100
80 60 -PSRR 40 20 0 100
IMPEDANCE -
20
AV = 100 10 AV = 10 AV = 1
1k 10k FREQUENCY - Hz 100k 1M
0 100
1k
10k FREQUENCY - Hz
100k
1M
TPC 21. Power Supply Rejection vs. Frequency @ 15 V
TPC 24. Closed-Loop Output Impedance vs. Frequency @ 15 V
6 VS = 5V RL = 2k TA = 25 C AVCL = 1
30 VS = 15V RL = 2k TA = 25 C AVOL = 1
MAXIMUM OUTPUT SWING - Volts
4
MAXIMUM OUTPUT SWING - Volts
10M
5
25
20
3
15
2
10
1
5
0 1k
10k
100k FREQUENCY - Hz
1M
0 1k
10k
100k FREQUENCY - Hz
1M
10M
TPC 22. Maximum Output Swing vs. Frequency @ 5 V
TPC 25. Maximum Output Swing vs. Frequency @ 15 V
50 45 40 VS = 5V RL = 2k VIN = 100mV p-p TA = 25 C AVCL = 1
20 18 16 14
OVERSHOOT - %
OVERSHOOT - %
35 30 25 20 15 10 5 0 0
VS = 15V RL = 2k VIN = 100mV p-p TA = 25 C AVCL = 1
POSITIVE EDGE
12 10 8 6 4 2 NEGATIVE EDGE
NEGATIVE EDGE POSITIVE EDGE
100
200 300 LOAD CAPACITANCE - pF
400
500
0 0 100 200 300 LOAD CAPACITANCE - pF 400 500
TPC 23. Small Signal Overshoot vs. Load Capacitance @ 5 V
TPC 26. Small Signal Overshoot vs. Load Capacitance @ 15 V
REV. D
-9-
OP113/OP213/OP413
2.0 VS = 5, 0 0.5V VOUT 1.5
SLEW RATE - V/ s
2.0 4.0V 1.5 +SLEW RATE
SLEW RATE - V/ s
VS = 15V VOUT = 10V
+SLEW RATE
-SLEW RATE
1.0 -SLEW RATE
1.0
0.5
0.5
0 -75
-50
-25
0 25 50 TEMPERATURE - C
75
100
125
0 -75
-50
-25
0 25 50 TEMPERATURE - C
75
100
125
TPC 27. Slew Rate vs. Temperature @ 5 V (0.5 V VOUT 4.0 V)
TPC 30. Slew Rate vs. Temperature @ 15 V (-10 V VOUT +10.0 V)
1s
100 90
1s
100 90
10
10 0%
0%
20mV
20mV
TPC 28. Input Voltage Noise @ 15 V (20 nV/div)
TPC 31. Input Voltage Noise @ 5 V (20 nV/div)
5
4
909 100 0.1Hz-10Hz AV = 1000 SUPPLY CURRENT - mA
VS = 3
18V
VS =
15V
VS = 5.0V 2
AV = 100
tOUT
1
0 -75
-50
-25
25 50 0 TEMPERATURE - C
75
100
125
TPC 29. Noise Test Diagram
TPC 32. Supply Current vs. Temperature
-10-
REV. D
OP113/OP213/OP413
APPLICATIONS
The OP113, OP213, and OP413 form a new family of high performance amplifiers that feature precision performance in standard dual supply configurations and, more importantly, maintain precision performance when a single power supply is used. In addition to accurate dc specifications, it is the lowest noise single supply amplifier available with only 4.7 nV/Hz typical noise density. Single supply applications have special requirements due to the generally reduced dynamic range of the output signal. Single supply applications are often operated at voltages of 5 V or 12 V, compared to dual supply applications with supplies of 12 V or 15 V. This results in reduced output swings. Where a dual supply application may often have 20 V of signal output swing, single supply applications are limited to, at most, the supply range and, more commonly, several volts below the supply. In order to attain the greatest swing, the single supply output stage must swing closer to the supply rails than in dual supply applications. The OP113 family has a new patented output stage that allows the output to swing closer to ground, or the negative supply, than previous bipolar output stages. Previous op amps had outputs that could swing to within about ten millivolts of the negative supply in single supply applications. However, the OP113 family combines both a bipolar and a CMOS device in the output stage, enabling it to swing to within a few hundred microvolts of ground. When operating with reduced supply voltages, the input range is also reduced. This reduction in signal range results in reduced signal-to-noise ratio, for any given amplifier. There are only two ways to improve this: increase the signal range or reduce the noise. The OP113 family addresses both of these parameters. Input signal range is from the negative supply to within one volt of the positive supply over the full supply range. Competitive parts have input ranges that are a half a volt to five volts less than this. Noise has also been optimized in the OP113 family. At 4.7 nV/Hz, it is less than one fourth that of competitive devices.
Phase Reversal
range may be somewhat excessive. Reducing the trimming potentiometer to a 2 k value will give a more reasonable range of 400 V.
+15V -15V
2 8 1 3 2 16 14 15
R5 1k 2N2219A
+10.000V
1 3 9 4 6 11 12 13 7
A2 1/2
AD588BD
8 10
OP213
+10.000V R3 17.2k 0.1% R4 500
10 F
350 LOAD CELL 100mV F.S.
6
CMRR TRIM 10-TURN T.C. LESS THAN 50ppm/ C A1
7
5
4
1/2
OP213
-15V R1 17.2k 0.1% R2 301 0.1%
OUTPUT 0 10V FS
Figure 1. Precision Load Cell Scale Amplifier
APPLICATION CIRCUITS A High Precision Industrial Load-Cell Scale Amplifier
The OP113 family makes an excellent amplifier for conditioning a load-cell bridge. Its low noise greatly improves the signal resolution, allowing the load cell to operate with a smaller output range, thus reducing its nonlinearity. Figure 1 shows one half of the OP113 family used to generate a very stable 10.000 V bridge excitation voltage while the second amplifier provides a differential gain. R4 should be trimmed for maximum common-mode rejection.
A Low Voltage Single Supply, Strain-Gage Amplifier
The OP113 family is protected against phase reversal as long as both of the inputs are within the supply ranges. However, if there is a possibility of either input going below the negative supply (or ground in the single supply case), the inputs should be protected with a series resistor to limit input current to 2 mA.
OP113 Offset Adjust
The true zero swing capability of the OP113 family allows the amplifier in Figure 2 to amplify the strain-gage bridge accurately even with no signal input while being powered by a single 5 V supply. A stable 4.000 V bridge voltage is made possible by the rail-to-rail OP295 amplifier, whose output can swing to within a millivolt of either rail. This high voltage swing greatly increases the bridge output signal without a corresponding increase in bridge input.
5V
2 8
2.500V
3 2
IN
6 OUT
2N2222A
1
1/2 OP295
4
REF43
4
GND
The OP113 has the facility for external offset adjustment, using the industry standard arrangement. Pins 1 and 5 are used in conjunction with a potentiometer of 10 k total resistance, connected with the wiper to V- (or ground in single supply applications). The total adjustment range is about 2 mV using this configuration. Adjusting the offset to zero has minimal effect on offset drift (assuming the potentiometer has a tempco of less than 1000 ppm/ C). Adjustment away from zero, however, (like all bipolar amplifiers) will result in a TCVOS of approximately 3.3 V/C for every millivolt of induced offset. It is therefore not generally recommended that this trim be used to compensate for system errors originating outside of the OP113. The initial offset of the OP113 is low enough that external trimming is almost never required but, if necessary, the 2 mV trim REV. D
4.000V 350 35mV FS R8 12.0k R7 20.0k
5 6 3
5V
8
1/2 OP295
4
OUTPUT 0V 3.5V
7
1/2 OP213
2
R3 20k
1
R2 20k
R4 100k
R1 100k
R5 2.10k
R6 27.4
RG = 2,127.4
Figure 2. Single Supply Strain-Gage Amplifier
-11-
OP113/OP213/OP413
A High Accuracy Linearized RTD Thermometer Amplifier A High Accuracy Thermocouple Amplifier
Zero suppressing the bridge facilitates simple linearization of the RTD by feeding back a small amount of the output signal to the RTD (Resistor Temperature Device). In Figure 3, the left leg of the bridge is servoed to a virtual ground voltage by amplifier A1, while the right leg of the bridge is also servoed to zero volt by amplifier A2. This eliminates any error resulting from commonmode voltage change in the amplifier. A 3-wire RTD is used to balance the wire resistance on both legs of the bridge, thereby reducing temperature mismatch errors. The 5.000 V bridge excitation is derived from the extremely stable AD588 reference device with 1.5 ppm/C drift performance. Linearization of the RTD is done by feeding a fraction of the output voltage back to the RTD in the form of a current. With just the right amount of positive feedback, the amplifier output will be linearly proportional to the temperature of the RTD.
-15V +15V
16 11 12 13 4 6 7 9 8 10 14 15 2
Figure 4 shows a popular K-type thermocouple amplifier with cold-junction compensation. Operating from a single 12 V supply, the OP113 family's low noise allows temperature measurement to better than 0.02C resolution from 0C to 1000C range. The cold-junction error is corrected by using an inexpensive silicon diode as a temperature measuring device. It should be placed as close to the two terminating junctions as physically possible. An aluminum block might serve well as an isothermal system.
5.000V R1 10.7k 1N4148 D1 - + - + R6 200 R3 53.6
3
12V 0.1 F
2
REF02EZ 6
4
R5 40.2k
R9 124k 12V 10 F + 0.1 F
R2 2.74k
R8 453
2
K-TYPE THERMOCOUPLE 40.7 V/ C
8
1/2
OP213
4
1
0V TO 10.00V (0 C TO 1000 C)
R4 5.62k
AD588BD
1 3
R3 50 R1 8.25k
RG FULL SCALE ADJUST R2 8.25k R5 4.02k R7 100
Figure 4. Accurate K-Type Thermocouple Amplifier
10 F RW1
+15V
6 8
100 RTD
R4 100 RW2
A2
5 4
7
1/2
OP213
-15V R8 49.9k
2
VOUT (10mV/ C) -1.50V = -150 C +5.00V = +500 C R9 5k LINEARITY ADJUST @1/2 FS
R6 should be adjusted for a zero-volt output with the thermocouple measuring tip immersed in a zero-degree ice bath. When calibrating, be sure to adjust R6 initially to cause the output to swing in the positive direction first. Then back off in the negative direction until the output just stops changing.
An Ultralow Noise, Single Supply Instrumentation Amplifier
RW3
A1
3
1
1/2
OP213
Extremely low noise instrumentation amplifiers can be built using the OP113 family. Such an amplifier that operates off a single supply is shown in Figure 5. Resistors R1-R5 should be of high precision and low drift type to maximize CMRR performance. Although the two inputs are capable of operating to zero volt, the gain of -100 configuration will limit the amplifier input common mode to not less than 0.33 V.
5V TO 36V + VIN - 1/2 1/2
Figure 3. Ultraprecision RTD Amplifier
To calibrate the circuit, first immerse the RTD in a zero-degree ice bath or substitute an exact 100 resistor in place of the RTD. Adjust the ZERO ADJUST potentiometer for a 0.000 V output, then set R9 LINEARITY ADJUST potentiometer to the middle of its adjustment range. Substitute a 280.9 resistor (equivalent to 500C) in place of the RTD, and adjust the FULL-SCALE ADJUST potentiometer for a full-scale voltage of 5.000 V. To calibrate out the nonlinearity, substitute a 194.07 resistor (equivalent to 250C) in place of the RTD, then adjust the LINEARITY ADJUST potentiometer for a 2.500 V output. Check and readjust the full-scale and half-scale as needed. Once calibrated, the amplifier outputs a 10 mV/C temperature coefficient with an accuracy better than 0.5C over an RTD measurement range of -150C to +500C. Indeed the amplifier can be calibrated to a higher temperature range, up to 850C.
OP213 OP213
*R1 10k *R2 10k *R3 10k *RG + 12.7 ) 25ppm/ C *R4 10k
VOUT
(200 *ALL RESISTORS 0.1%,
GAIN =
20k +6 RG
Figure 5. Ultralow Noise, Single Supply Instrumentation Amplifier
-12-
REV. D
OP113/OP213/OP413
Supply Splitter Circuit Low Noise Voltage Reference
The OP113 family has excellent frequency response characteristic that makes it an ideal pseudo-ground reference generator as shown in Figure 6. The OP113 family serves as a voltage follower buffer. In addition, it drives a large capacitor that serves as a charge reservoir to minimize transient load changes, as well as a low impedance output device at high frequencies. The circuit easily supplies 25 mA load current with good settling characteristics.
VS+ = 5V 12V
Few reference devices combine low noise and high output drive capabilities. Figure 7 shows the OP113 family used as a two-pole active filter that band limits the noise of the 2.500 V reference. Total noise measures 3 V p-p.
5V 5V 2 IN 10k OUT 6 10k + C2 10 F 3 - 10 F + 2
8 1/2
R3 2.5k C1 0.1 F R1 5k 2 8 1/2 R4 100 + C2 1F
OP113
4
1
OUTPUT 2.500V
REF43
GND 4
3 V p-p NOISE
OP113
3 R2 5k 4
1
VS+ 2
Figure 7. Low Noise Voltage Reference
OUTPUT
5 V Only Stereo DAC for Multimedia
Figure 6. False Ground Generator
The OP113 family's low noise and single supply capability are ideally suited for stereo DAC audio reproduction or sound synthesis applications such as multimedia systems. Figure 8 shows an 18-bit stereo DAC output setup that is powered from a single 5 V supply. The low noise preserves the 18-bit dynamic range of the AD1868. For DACs that operate on dual supplies, the OP113 family can also be powered from the same supplies.
5V SUPPLY
AD1868
1 2 3 4 5 6 18-BIT LL DAC 18-BIT DL SERIAL REG. CK DR 18-BIT LR SERIAL REG. VREF VL
VBL
16
8
15 7.68k VOL 14 330pF 13 AGND 12 VREF VOR 10 7.68k VS 9 330pF 5 9.76k 6 11 7.68k 7.68k 9.76k
1/2
220 F
1
OP213
+- 47k
LEFT CHANNEL OUTPUT
100pF
7 DGND 18-BIT DAC 8 VBR
100pF 220 F 7 +- 47k
1/2
OP213
RIGHT CHANNEL OUTPUT
Figure 8. 5 V Only 18-Bit Stereo DAC
SoundPort is a registered trademark of Analog Devices, Inc.
REV. D
-13-
OP113/OP213/OP413
Low Voltage Headphone Amplifiers Precision Voltage Comparator
Figure 9 shows a stereo headphone output amplifier for the AD1849 16-bit SoundPort(R) Stereo Codec device. The pseudoreference voltage is derived from the common-mode voltage generated internally by the AD1849, thus providing a convenient bias for the headphone output amplifiers.
OPTIONAL GAIN 1k VREF 10 F LOUT1L 31 10k 47k L VOLUME CONTROL
5k 5V 1/2 16 220 F +
With its PNP inputs and zero volt common-mode capability, the OP113 family can make useful voltage comparators. There is only a slight penalty in speed in comparison to IC comparators. However, the significant advantage is its voltage accuracy. For example, VOS can be a few hundred microvolts or less, combined with CMRR and PSRR exceeding 100 dB, while operating on 5 V supply. Standard comparators like the 111/311 family operate on 5 V, but not with common-mode at ground, nor with offset below 3 mV. Indeed, no commercially available single supply comparator has a VOS less than 200 V. Figure 11 shows the OP113 family response to a 10 mV overdrive signal when operating in open loop. The top trace shows the output rising edge has a 15 s propagation delay, while the bottom trace shows a 7 s delay on the output falling edge. This ac response is quite acceptable in many applications.
10mV OVERDRIVE +2.5V 0V 25k 1/2 -2.5V 100 5V
OP213
HEADPHONE LEFT
AD1849
VREF
5V
1/2
OP213
CMOUT 19 10k LOUT1R 29 10 F R VOLUME CONTROL 1k 5k
100 90
OP113
1/2
16
OP213
220 F + 47k
tr = tf = 5ms
HEADPHONE RIGHT
2V
5s
OPTIONAL GAIN VREF
Figure 9. Headphone Output Amplifier for Multimedia Sound Codec
Low Noise Microphone Amplifier for Multimedia
10 0%
The OP113 family is ideally suited as a low noise microphone preamp for low voltage audio applications. Figure 10 shows a gain of 100 stereo preamp for the AD1849 16-bit SoundPort Stereo Codec chip. The common-mode output buffer serves as a "phantom power" driver for the microphones.
10k 5V 1/2 10 F LEFT ELECTRET CONDENSER MIC INPUT 50
2V
Figure 11. Precision Comparator
The low noise and 250 V (maximum) offset voltage enhance the overall dc accuracy of this type of comparator. Note that zero crossing detectors and similar ground referred comparisons can be implemented even if the input swings to -0.3 V below ground.
OP213
17
MINL
20
10k 5V
100
AD1849
19
CMOUT
1/2
OP213
100 20 10k 10 F 50 1/2 RIGHT ELECTRET CONDENSER MIC INPUT
OP213
15
MINR
10k
Figure 10. Low Noise Stereo Microphone Amplifier for Multimedia Sound Codec
SoundPort is a registered trademark of Analog Devices, Inc.
-14-
REV. D
OP113/OP213/OP413
* SECOND CURRENT NOISE SOURCE DN5 27 28 DIN DN6 28 29 DIN VN5 27 0 DC 2 VN6 0 29 DC 2 * * GAIN STAGE & DOMINANT POLE AT .2000E+01 HZ G2 34 36 19 20 2.65E-04 R7 34 36 39E+06 V3 35 4 DC 6 D4 36 35 DX VB2 34 4 1.6 * * SUPPLY/2 GENERATOR ISY 7 4 0.2E-3 R10 7 60 40E+3 R11 60 4 40E+3 C3 60 0 1E-9 * * CMRR STAGE & POLE AT 6 kHZ ECM 50 4 POLY(2) 3 BOE 60 2 60 0 1.6 0 1.6 CCM 50 51 26.5E-12 RCM1 50 51 1E6 RCM2 51 4 1 * * OUTPUT STAGE R12 37 36 1E3 R13 38 36 500 C4 37 6 20E-12 C5 38 39 20E-12 M1 39 36 4 4 MN L=9E-6 W=1000E-6 AD=15E-9 AS=15E-9 M2 45 36 4 4 MN L=9E-6 W=1000E-6 AD=15E-9 AS=15E-9 D5 39 47 DX D6 47 45 DX Q3 39 40 41 QPA 8 VB 7 40 DC 0.861 R14 7 41 375 Q4 41 7 43 QNA 1 R17 7 43 15 Q5 43 39 6 QNA 20 Q6 46 45 6 QPA 20 R18 46 4 15 Q7 36 46 4 QNA 1 M3 6 36 4 4 MN L = 9E-6 W=2000E-6 AD=30E-9 AS=30E-9 * * NONLINEAR MODELS USED * .MODEL DX D (IS=1E-15) .MODEL DY D (IS=1E-15 BV=7) .MODEL PNP1 PNP (BF=220) .MODEL DEN D(IS=1E-12 RS=1016 KF=3.278E-15 AF=1) .MODEL DIN D(IS=1E-12 RS=100019 KF=4.173E-15 AF=1) .MODEL QNA NPN(IS=1.19E-16 BF=253 VAF=193 VAR=15 RB=2.0E3 + IRB=7.73E-6 RBM=132.8 RE=4 RC=209 CJE=2.1E-13 VJE=0.573 + MJE=0.364 CJC=1.64E-13 VJC=0.534 MJC=0.5 CJS=1.37E-12 + VJS=0.59 MJS=0.5 TF=0.43E-9 PTF=30) .MODEL QPA PNP(IS=5.21E-17 BF=131 VAF=62 VAR= 15 RB=1.52E3 + IRB=1.67E-5 RBM=368.5 RE=6.31 RC=354.4 CJE=1.1E-13 + VJE=0.745 MJE=0.33 CJC=2.37E-13 VJC=0.762 MJC=0.4 + CJS=7.11E-13 VJS=0.45 MJS=0.412 TF=1.0E-9 PTF=30) .MODEL MN NMOS(LEVEL=3 VTO=1.3 RS=0.3 RD=0.3 TOX=8.5E-8 + LD=1.48E-6 WD=1E-6 NSUB=1.53E16 UO=650 DELTA=10 VMAX=2E5 + XJ=1.75E-6 KAPPA=0.8 ETA=0.066 THETA=0.01 TPG=1 CJ=2.9E-4 + PB=0.837 MJ=0.407 CJSW=0.5E-9 MJSW=0.33) * .ENDS OP113 Family
+IN 9V 9V OUT -IN
Figure 12. OP213 Simplified Schematic
*OP113 Family SPICE Macro-Model * *Copyright 1992 by Analog Devices, Inc. * *Node Assignments * * Noninverting Input * * * Inverting Input Positive Supply Negative Supply
* Output * .SUBCKT OP113 Family 32 7 4 6 * * INPUT STAGE R3 4 19 1.5E3 R4 4 20 1.5E3 C1 19 20 5.31E-12 I1 7 18 106E-6 IOS 23 25E-09 EOS 12 5 POLY(1) 51 4 25E-06 1 Q1 19 3 18 PNP1 Q2 20 12 18 PNP1 CIN 32 3E-12 D1 31 DY D2 21 DY EN 52 22 0 1 GN1 02 25 0 1E-5 GN2 03 28 0 1E-5 * * VOLTAGE NOISE SOURCE WITH FLICKER NOISE DN1 21 22 DEN DN2 22 23 DEN VN1 21 0 DC 2 VN2 0 23 DC 2 * * CURRENT NOISE SOURCE WITH FLICKER NOISE DN3 24 25 DIN DN4 25 26 DIN VN3 24 0 DC 2 VN4 0 26 DC 2 *
REV. D
-15-
OP113/OP213/OP413
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic DIP (N-8)
0.430 (10.92) 0.348 (8.84)
8 5
14
14-Lead Plastic DIP (N-14)
C00286-0-1/02(D) PRINTED IN U.S.A.
0.795 (20.19) 0.725 (18.41)
8 7
1
4
0.280 (7.11) 0.240 (6.10) 0.060 (1.52) 0.015 (0.38) 0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93)
1
0.280 (7.11) 0.240 (6.10) 0.060 (1.52) 0.015 (0.38)
PIN 1 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.92) 0.022 (0.558) 0.014 (0.36)
0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93)
PIN 1 0.210 (5.33) MAX
0.130 (3.30) 0.160 (4.06) MIN 0.115 (2.93) 0.022 (0.558) 0.100 0.070 (1.77) SEATING PLANE 0.014 (0.356) (2.54) 0.045 (1.15) BSC
0.015 (0.381) 0.008 (0.204)
0.130 (3.30) MIN 0.100 0.070 (1.77) SEATING (2.54) 0.045 (1.15) PLANE BSC
0.015 (0.38) 0.008 (0.20)
8-Lead Narrow-Body Plastic DIP (SO-8)
0.1968 (5.00) 0.1890 (4.80)
8 1 5 4
16-Lead Wide Body SOIC (R-16)
0.4133 (10.50) 0.3977 (10.00)
16 9
PIN 1 0.0098 (0.25) 0.0040 (0.10)
0.0688 (1.75) 0.0532 (1.35)
0.0196 (0.50) x 45 0.0099 (0.25)
1
8
PIN 1
0.0500 0.0192 (0.49) SEATING (1.27) 0.0098 (0.25) PLANE BSC 0.0138 (0.35) 0.0075 (0.19) 8 0 0.0500 (1.27) 0.0160 (0.41)
0.0118 (0.30) 0.0040 (0.10)
0.1043 (2.65) 0.0926 (2.35)
0.4193 (10.65) 0.3937 (10.00)
0.2992 (7.60) 0.2914 (7.40)
0.1574 (4.00) 0.1497 (3.80)
0.2440 (6.20) 0.2284 (5.80)
0.0291 (0.74) x 45 0.0098 (0.25)
0.0500 (1.27) BSC
0.0192 (0.49) SEATING 0.0138 (0.35) PLANE
8 0.0125 (0.32) 0 0.0091 (0.23)
0.0500 (1.27) 0.0157 (0.40)
Revision History
Location 9/01--Data Sheet changed from REV. C to REV. D. Page
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
-16-
REV. D

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